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ish and parasail timings
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| # Parasail commit: 600fb261 (v2.6.2) | |
| # Ish commit: 5090c3e (v1.3.0) | |
| # Capping parasail threads to 16, to match ish which can only use physical cores (mojo bug), so both use 16 threads | |
| # SSE | |
| time ./apps/parasail_aligner -a sg_striped_sse41_128_16 -X 2 -x -M 2 -o 3 -e 1 -d -t 1 -q ./patterns.fa -f /srv/refdata/chm13v2.0.fa -v -V | |
| --> 1m21.371s | |
| time ./apps/parasail_aligner -a sg_dx_striped_sse41_128_16 -X 2 -x -M 2 -o 3 -e 1 -d -t 1 -q ./patterns.fa -f /srv/refdata/chm13v2.0.fa -v -V | |
| --> 1m20.438s | |
| time ./apps/parasail_aligner -a sg_dx_striped_sse41_128_16 -X 2 -x -M 2 -o 3 -e 1 -d -t 16 -q ./patterns.fa -f /srv/refdata/chm13v2.0.fa -v -V | |
| --> 0m21.093s | |
| time ./ish-sse --scoring-matrix actgn --record-type fastx --threads 1 ACTCGACTTCAGCTACGCACATA /srv/refdata/chm13v2.0.fa | |
| --> 1m6.993s | |
| time ./ish-sse --scoring-matrix actgn --record-type fastx --threads 16 ACTCGACTTCAGCTACGCACATA /srv/refdata/chm13v2.0.fa | |
| --> 0m17.822s | |
| # AVX2 | |
| time ./apps/parasail_aligner -a sg_striped_avx2_256_16 -X 2 -x -M 2 -o 3 -e 1 -d -t 1 -q ./patterns.fa -f /srv/refdata/chm13v2.0.fa -v -V | |
| --> 2m17.049s | |
| time ./apps/parasail_aligner -a sg_dx_striped_avx2_256_16 -X 2 -x -M 2 -o 3 -e 1 -d -t 1 -q ./patterns.fa -f /srv/refdata/chm13v2.0.fa -v -V | |
| --> 2m15.396s | |
| time ./apps/parasail_aligner -a sg_dx_striped_avx2_256_16 -X 2 -x -M 2 -o 3 -e 1 -d -t 16 -q ./patterns.fa -f /srv/refdata/chm13v2.0.fa -v -V | |
| --> 0m29.573s | |
| time ./ish-avx2 --scoring-matrix actgn --record-type fastx --threads 1 ACTCGACTTCAGCTACGCACATA /srv/refdata/chm13v2.0.fa | |
| --> 2m0.773s | |
| time ./ish-avx2 --scoring-matrix actgn --record-type fastx --threads 16 ACTCGACTTCAGCTACGCACATA /srv/refdata/chm13v2.0.fa | |
| --> 0m26.218s | |
| # CPU Info | |
| $ lscpu | |
| Architecture: x86_64 | |
| CPU op-mode(s): 32-bit, 64-bit | |
| Address sizes: 43 bits physical, 48 bits virtual | |
| Byte Order: Little Endian | |
| CPU(s): 32 | |
| On-line CPU(s) list: 0-31 | |
| Vendor ID: AuthenticAMD | |
| Model name: AMD Ryzen 9 3950X 16-Core Processor | |
| CPU family: 23 | |
| Model: 113 | |
| Thread(s) per core: 2 | |
| Core(s) per socket: 16 | |
| Socket(s): 1 | |
| Stepping: 0 | |
| Frequency boost: enabled | |
| CPU(s) scaling MHz: 48% | |
| CPU max MHz: 4761.2300 | |
| CPU min MHz: 2200.0000 | |
| BogoMIPS: 7000.10 | |
| Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_t | |
| sc cpuid extd_apicid aperfmperf rapl pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a mis | |
| alignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb cat_l3 cdp_l3 hw_pstate ssbd mba ibpb stibp vmmcall fsgsbase bmi1 avx2 sme | |
| p bmi2 cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local clzero irperf xsaveerptr rdpru wbnoinvd arat npt lbr | |
| v svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif v_spec_ctrl umip rdpid overflow_recov succor smca sev sev_es | |
| Virtualization features: | |
| Virtualization: AMD-V | |
| Caches (sum of all): | |
| L1d: 512 KiB (16 instances) | |
| L1i: 512 KiB (16 instances) | |
| L2: 8 MiB (16 instances) | |
| L3: 64 MiB (4 instances) | |
| NUMA: | |
| NUMA node(s): 1 | |
| NUMA node0 CPU(s): 0-31 | |
| Vulnerabilities: | |
| Gather data sampling: Not affected | |
| Itlb multihit: Not affected | |
| L1tf: Not affected | |
| Mds: Not affected | |
| Meltdown: Not affected | |
| Mmio stale data: Not affected | |
| Reg file data sampling: Not affected | |
| Retbleed: Mitigation; untrained return thunk; SMT enabled with STIBP protection | |
| Spec rstack overflow: Mitigation; Safe RET | |
| Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl | |
| Spectre v1: Mitigation; usercopy/swapgs barriers and __user pointer sanitization | |
| Spectre v2: Mitigation; Retpolines; IBPB conditional; STIBP always-on; RSB filling; PBRSB-eIBRS Not affected; BHI Not affected | |
| Srbds: Not affected | |
| Tsx async abort: Not affected |
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