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@mosheto
Last active January 2, 2020 08:25
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ORG $0
DC.L $2200, $8 ; define sp and pc
; VIA Configuration
; Will be used to see if bit#0 of the switch
; to determine if the board is a receiver or transmitter
; and to display the percentage of the receiver's buffer
; +----+----+------+----------+
; | A2 | A0 | CR#2 | Register |
; +----+----+------+----------+
; | 0 | 0 | 0/1 | DDRA/DRA |
; +----+----+------+----------+
; | 0 | 1 | X | CRA |
; +----+----+------+----------+
; | 1 | 0 | 0/1 | DDRB/DRB |
; +----+----+------+----------+
; | 1 | 1 | X | CRB |
; +----+----+------+----------+
LEA $6000, A1 ; Address of VIA Chip
; Configure Port A
MOVE.B #$00, $01(A1) ; Select DDRA
MOVE.B #$00, $00(A1) ; Make (4, 5, 6, 7) bits as Input (Switch)
Move.B #$04, $01(A1) ; Enable DRA
; Configure Port B
MOVE.B #$00, $05(A1) ; Select DDRB
MOVE.B #$FF, $04(A1) ; Make (0, 1, 2, 3) bits as Output (LED's)
MOVE.B #$04, $05(A1) ; Enable DRB
; To get the switch state
MOVE.B $00(A1), D0
; To output number 5 to the LED's for example
MOVE.B #$05, $04(A1)
; -----------------------------------------------------
; PTM Configuration
; The ACIA’s TxC and RxC is driven by a signal from the timer
; module (divide by 8 MHz / 104) => 77KHz.
; To get 77 KHz we will be using
; CR1/CR3 are select by CR2#0
; 1 for CR1 and 0 for CR2
; +---------+----+----+----+----------+
; | Address | A4 | A2 | A1 | Register |
; +---------+----+----+----+----------+
; | $00 | 0 | 0 | 0 | CR1/CR3 |
; +---------+----+----+----+----------+
; | $02 | 0 | 0 | 1 | CR2 |
; +---------+----+----+----+----------+
; | $04 | 0 | 1 | 0 | M1 |
; +---------+----+----+----+----------+
; | $06 | 0 | 1 | 1 | L1 |
; +---------+----+----+----+----------+
; | $10 | 1 | 0 | 0 | M2 |
; +---------+----+----+----+----------+
; | $12 | 1 | 0 | 1 | L2 |
; +---------+----+----+----+----------+
; | $14 | 1 | 1 | 0 | M3 |
; +---------+----+----+----+----------+
; | $16 | 1 | 1 | 1 | L3 |
; +---------+----+----+----+----------+
LEA $6020, A2 ; Address of PTM Chip
; Reset timers
MOVE.B #$01, $02(A2) ; Select CR1
MOVE.B #$01, $00(A2) ; Reset timers
; Configure Timer#1 to get 77KHz
MOVE.B #$80, $00(A2) ; Configure CR#1
MOVE.B #$00, $04(A2) ; MSB1
MOVE.B #$33, $06(A2) ; LSB1
STOP $2000 ; TODO: Ask about it
; Configure Timer#2 to get interrupts every 20ms
; 1/20ms = 50 Hz --> N = 7999 = 1F3F
; We are using pluse width comparison mode
; MOVE.B #$F3, $02(A2) ; Configure CR#2 and select CR#3
; MOVE.B #$1F, $10(A2) ; MSB#2
; MOVE.B #$3F, $12(A2) ; LSB#2
; ACIA Configuration
; This chip will get 77KHz from PTM Timer#1
; to get 4800 bit/s we must divide the frequency
; by 16.
; +---------+----+------+----------+
; | Address | A2 | R/W* | Register |
; +---------+----+------+----------+
; | $00 | 0 | 0 | CR |
; +---------+----+------+----------+
; | $00 | 0 | 1 | SR |
; +---------+----+------+----------+
; | $04 | 1 | 0 | TDR |
; +---------+----+------+----------+
; | $04 | 1 | 1 | RDR |
; +---------+----+------+----------+
; Flags
XON:
DC.B $11
XOFF:
DC.B $13
; Buffer size and thresholds
BUFF_SIZE:
DC.B $FF
BUFF_20:
DC.B 55
BUFF_40:
DC.B 105
BUFF_60:
DC.B 155
BUFF_80:
DC.B 205
LEA $6040, A3 ; Address of ACIA Chip
MOVE.B #$03, $00(A3) ; Reset ACIA
MOVE.B $00(A1), D0 ; Get switch state
BTST.B #$04, D0 ; See if the first bit of the switch
; which is bit 4 in the register
BNE RECEIVER ; if the bit is 0 then I'm the reciever
; Sender routine ----------------------------
SENDER:
MOVE.B #$15, $00(A3) ; Load Configuration to CR with interrupt disabled
MOVE.B #$00, D1 ; Initialize counter
MOVE.B XON, D2 ; Initally the flag is XON($11)
LOOP_2:
BTST.B #$01, $00(A3) ; See if the TDR is done sending (TDR empty)
BEQ LOOP_2 ; Not empty try again
BTST.B #$00, $00(A3) ; See if we received anything (RDR full)
BNE SEND ; Nothing has been sent
MOVE.B $04(A3), D2 ; Move the flag to D2
SEND:
CMPI.B XOFF, D2 ; If D2 has XOFF($13)
BEQ LOOP_2 ; Don't send anything go back
MOVE.B D1, $04(A3) ; Load the charactar to TDR
ADDI.B #$01, D1 ; Counter = Counter + 1
BRA LOOP_2
; Receiver routine -------------------------
RECEIVER:
MOVE.B #$35, $00(A3) ; Load Configuration to CR with interrupts enabled
MOVE.B #$00, D1 ; Offset to the buffer (last empty location)
MOVE.B #$00, D2 ; The begining of the buffer (first char in the buffer)
MOVE.B #$00, D3 ; Counter
MOVE.B #$00, D4 ; Size of the buffer
LEA $2000, A4 ; Address of the buffer (circular array)
; Loop until a charactar is received
LOOP_1:
NOP
BRA LOOP_1
; Interrupt to move a received character to the buffer
; and handle sending the XOFF flag.
ORG $7C
DC.L $500
ORG $500
MOVE.B $04(A3), D5
MOVE.B D5, $0(A4, D1) ; Move the character to the buffer
ADDI.B #$01, D1 ; Point to the next (empty) location in the buffer
ANDI.W #$00FF, D1 ; To circulate the pointer to the start of the buffer after it hits the end (FF -> 00)
; Simulation of 20ms interrput to pull a charactar from the buffer
ADD.B #$01, D3 ; ++Counter
ADD.B #$01, D4 ; Increase the size of the buffer
CMPI.B #$0A, D3
BLT TEST_PERCENTAGE ; If counter < 10 then skip pulling a charactar
MOVE.L #$00, D3 ; Reset counter
JSR PULL_CHAR ; if counter == 10 pull a charactar
TEST_PERCENTAGE:
CMPI.B BUFF_80, D4 ; The buffer is 80% or greater
BGE _80
CMPI.B BUFF_60, D4 ; The buffer is 60% or greater
BGE _60
CMPI.B BUFF_40, D4 ; The buffer is 40% or greater
BGE _40
CMPI.B BUFF_20, D4 ; The buffer is 20% or greater
BGE _20
RTE ; If non of the above return
_20:
MOVE.B #$01, $04(A1) ; Turn on 1 LEDs
MOVE.B XON, $04(A3) ; Keep sending
RTE
_40:
MOVE.B #$03, $04(A1) ; Turn on 2 LEDs
MOVE.B XON, $04(A3) ; Keep sending
RTE
_60:
MOVE.B #$07, $04(A1) ; Turn on 3 LEDs
RTE
_80:
MOVE.B #$0F, $04(A1) ; Turn on all LEDs
MOVE.B XOFF, $04(A3) ; Stop sending
LOOP_3:
JSR PULL_CHAR
CMPI.B BUFF_40, D4 ; The buffer is greater than 40%
BGT LOOP_3 ; Continue pulling
BRA TEST_PERCENTAGE ; Test the persentage again to send XON again
RTE
; Subroutine to pull a character from the buffer
PULL_CHAR:
ADDI.B #$01, D2 ; Forward the pointer (simulate pulling a charactar)
ANDI.W #$00FF, D2 ; To circulate the pointer to the start of the buffer after it hits the end (FF -> 00)
SUBI.B #$01, D4 ; Decrease the buffer size
RTS
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