Nutchanon Taechasuk Quatton
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| `default_nettype none | |
| `timescale 10ps / 1ps | |
| module div32p2 | |
| #( parameter K = 32 ) | |
| ( input wire [K+31:0] x, | |
| input wire [K-1:0] d, | |
| output reg [K-1:0] q, | |
| output reg [K-1:0] r, | |
| input wire clk, |